The present invention relates to a semiconductor device and a manufacturing method thereof and can be used for the manufacturing of, e.g., a semiconductor device having a metal gate electrode.
As a transistor to be formed in the logic portion of a next-generation microcomputer that can be miniaturized, a transistor including a metal gate electrode and a high-dielectric-constant film (high-k film) is known. As a method of forming such a transistor, a so-called gate last process is known which forms a dummy gate electrode over a substrate and then replaces the dummy gate electrode with a metal gate electrode.
As an electrically writable/erasable nonvolatile semiconductor storage device, a memory cell having a conductive floating gate electrode or a trapping insulating film surrounded by oxide films under the gate electrode of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) has been used widely. Examples of the nonvolatile semiconductor storage device using the trapping insulating film include a MONOS (Metal Oxide Nitride Oxide Semiconductor) split-gate cell.
Patent Document 1 (Japanese Unexamined Patent Publication No. 2014-154790) describes that, in the case of merging a memory cell with a MISFET in a logic portion, silicide layers are formed over the source/drain regions of the MISFET. Subsequently, the metal gate electrode of the MISFET is formed by a gate last process, and then a silicide layer is formed over the gate electrode of the memory cell.
Patent Document 2 (Japanese Translation of PCT Application No. 2002-526920) describes that, after a multilayer film in which a dummy gate electrode and a nitride film are successively stacked is formed and an oxide film in which the multilayer film is to be embedded is deposited, the upper surface of the oxide film is polished to expose the nitride film. Subsequently, the nitride film and the dummy gate electrode are removed and, in the resulting trench, a metal gate electrode is formed.